I got asked a easy sounding question lately: how many UARTs does SoC xxx have? This seems clear from the datasheet, but can you use all of them at the same time? Or would some pin assignments overlap?
Now this was quite easy to answer in the old days, when one IP block like let's say SPI0 could be activated but only on one set of pins. If you wanted SPI0, you could use it on those pins or you could not use it at all. Nowadays the SoCs can do multiplexing in a way you can decide if a peripheral uses these pins, or those, or others. So e.g. you could use SPI0 on pins (yes, pads) 1, 2, 3 or pins 7, 8, 9 (not both of course) – with the Microchip SAMA5D2 this feature is called IO Sets.
This is nice for flexibility in board layout, but makes additional headaches when assigning pins. if the initial question is a little more specific like "can I use all SPI interfaces _and_ all UARTs at the same time?" it's not that easy to answer anymore, because of that flexibility: it might fit, if I choose the right IO sets for each, but does it really?
Are there any tools specific to the sam9 and sama5 socs helping with this? I don't mean at runtime, but at board design time?
I know NXP has their so called "Pins Tool": https://www.nxp.com/design/designs/pins-tool-for-i.mx-application-processors:PINS-TOOL-IMX – you basically select everything what you need, map it to certain pins/pads, and have direct visual feedback which are already used and for what. I heard there are comparable tools by ST as well. Is there anything similar for the Microchip SoCs? Or are there generic tools which could help? I mean besides copying everything from the datasheets pinout tables to some spreadsheet and poking around in it?
Thanks and greets
All design tool related questions: compiler, assembler, linker. Embedded programming questions: assembler, C code.
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