Configuring AT91 Bootstrap, U-boot, Linux Kernel and SAM-BA to boot from NAND

[methos]

Our custom product based on the SAMA5D44 has been operating with an SD card without issues for revision 1 of our product. We have decided to transition the board to NAND flash for revision 2.

It would seem I am a bit out of my depth in accomplishing this goal. Nonetheless, I have been working towards it for the past week. The main issue I have identified is that our prototype boards are using a NAND chip with very different specification than the reference SAMA5D44-xplained board.

More specifically, the reference board uses a MT29F4G08ABAEA 4 Gbit NAND flash and our prototype for revision 2 uses MT29F2G08ABAEAWP 2 Gbit NAND flash. I have identified that this particular NAND flash requires the following PMECC header: 0xC0902405 based on the NAND and SAMA5D44 datasheets.

spareSize = 64, eccBitReq = 4, sectorSize = 512, nbSectorPerPage = 4, usePmecc = 1, eccOffset = 36

Upon changing the nand flash header in the demo_linux_nandflash_usb.qml to reflect the correct PMECC header, I was able to get past the RomBoot prompt on our board. This is when I discovered that the PMECC settings must be changed in the AT91Bootstrap, U-boot and the Linux Kernel as well. I discovered this when U-boot showed the following:

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U-Boot 2019.04-linux4sam_6.1 (Oct 29 2019 - 18:35:53 +0000)

CPU: SAMA5D44
Crystal frequency:       12 MHz
CPU clock        :      600 MHz
Master clock     :      200 MHz
DRAM:  256 MiB
NAND:  256 MiB
MMC:   Atmel mci: 0
Loading Environment from NAND... PMECC: Too many errors
NAND read from offset 140000 failed -74
*** Warning - some problems detected reading environment; recovered successfully
*** Warning - bad CRC, using default environment

In:    serial@fc00c000
Out:   serial@fc00c000
Err:   serial@fc00c000
Net:   eth0: ethernet@f8020000
Hit any key to stop autoboot:  0 

NAND read: device 0 offset 0x180000, size 0x80000
PMECC: Too many errors
NAND read from offset 180000 failed -74
 0 bytes read: ERROR

NAND read: device 0 offset 0x200000, size 0x600000
PMECC: Too many errors
NAND read from offset 200000 failed -74
 0 bytes read: ERROR

I started looking into how to modify u-boot, and I was able to successfully change the requisite settings to match the NAND flash by modifying the sama5d4_xplained.h header in include/configs. I realize because this is a custom board I should write my own header file, but for the time being I wanted to hack together a bootable operating system.

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#define CONFIG_SYS_NAND_U_BOOT_OFFS	0x40000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_PAGE_SIZE	0x800
#define CONFIG_SYS_NAND_PAGE_COUNT	64
#define CONFIG_SYS_NAND_OOBSIZE		64
#define CONFIG_SYS_NAND_BLOCK_SIZE	0x20000
#define CONFIG_SYS_NAND_BAD_BLOCK_POS	0x0

The above NAND settings are a match for our particular version of NAND Flash. I also changed the sama5d4_xplained_nandflash_defconfig's CONFIG_PMECC_CAP to 4 to reflect the 4 bit ECC minimum correction of our NAND flash. After this change, I discovered that our device has 256 MB of DRAM, not 512 MB of DRAM like the reference board. I found these definitions in the sama5d4_xplained.h, and I set them to the correct size of our DRAM.

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#define CONFIG_SYS_SDRAM_BASE           0x10000000
#define CONFIG_SYS_SDRAM_SIZE		0x10000000

Upon the above change, u-boot never begins. AT91 Bootstrap runs twice, and nothing else happens.

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AT91Bootstrap 3.8.13 (Tue Oct 29 17:30:33 UTC 2019)

EEPROM: Loading AT24xx information ...
EEPROM: BoardName | [Revid] | VendorName

EEPROM: Using default information

EEPROM: Board sn: 0x1012420 revision: 0x680820

NAND: ONFI flash detected
NAND: Manufacturer ID: 0x2c Chip ID: 0xda
NAND: Page Bytes: 2048, Spare Bytes: 64
NAND: ECC Correctability Bits: 4, ECC Sector Bytes: 512
NAND: Disable On-Die ECC
NAND: Initialize PMECC params, cap: 4, sector: 512
NAND: Image: Copy 0xa0000 bytes from 0x40000 to 0x26f00000
NAND: Done to load image


AT91Bootstrap 3.8.13 (Tue Oct 29 17:30:33 UTC 2019)

EEPROM: Loading AT24xx information ...
EEPROM: BoardName | [Revid] | VendorName

EEPROM: Using default information

EEPROM: Board sn: 0x1012420 revision: 0x680820

NAND: ONFI flash detected
NAND: Manufacturer ID: 0x2c Chip ID: 0xda
NAND: Page Bytes: 2048, Spare Bytes: 64
NAND: ECC Correctability Bits: 4, ECC Sector Bytes: 512
NAND: Disable On-Die ECC
NAND: Initialize PMECC params, cap: 4, sector: 512
NAND: Image: Copy 0xa0000 bytes from 0x40000 to 0x26f00000
NAND: Done to load image

I then noticed the CONFIG_SYS_LOAD_ADDR field, and upon doing some research I learned this is where the kernel is loaded in memory. The value of this definition is greater than the amount of RAM on the system. This is around the time I realized there is a lot going on here that I have very little knowledge of.

I have two questions.

1) Is there anyone my company can hire as an outside contractor to help rectify some of these problems? Does Microchip offer these services?

2) Where can I learn more about configuring u-boot for a particular model of NAND flash? Researching PMECC settings and more broadly how to program u-boot for SAMA5D devices has given me very little information to work with. I may be able to get more completed with some concentrated research, however I also have a lot of other work to do in relation to our application layer and I fear working on this may lead down a rabbit hole.